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Senior Staff Analog Mixed-Signal Design and Modelling Engineer

ionq·Oxfordsenior

In short

  • →Diseñar e integrar circuitos analógicos y mixtos para chips en frío (Cryo-CMOS) en IonQ.
  • →Modelar chips a múltiples niveles de abstracción para simulación y verificación previa al tape-out.
  • →Liderar el desarrollo de modelos de sistema que combinan circuitos transistor y comportamiento en Verilog-A/AMS.

Fluent English required for technical collaboration and documentation.

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The questions they'll ask you

1. ¿Cómo decides qué bloques modelar a nivel transistor y cuáles a nivel de comportamiento en un modelo de sistema?

2. Describe un caso donde un modelo de sistema falló al predecir el comportamiento del silicio — ¿qué hiciste?

3. ¿Cómo validas la fidelidad de un modelo de sistema contra datos de silicio real?

🔒 +7 more questions

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💵 USD · Remote · No visa

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What they ask for

  • ✓Experiencia comprobada en diseño de circuitos analógicos y mixtos en CMOS
  • ✓Habilidades sólidas en simulación y verificación de circuitos
  • ✓Conocimiento avanzado de Verilog-A/Verilog-AMS y SystemVerilog
  • ✓Experiencia en flujo de diseño de ICs desde especificación hasta tape-out
  • ✓Capacidad para integrar bloques en sistema y validar en silicio
  • ✓Experiencia en entornos de diseño en frío (cryo) o aplicaciones cuánticas

Don't tick every box? That's normal — your free dossier shows your gaps and how to cover them in the interview.

CMOSAnalog Mixed-Signal DesignVerilog-AVerilog-AMSSystemVerilogCadence VirtuosoSpectreSynopsys Custom CompilerCalibrePyAEDT

Who should you write to at ionq?

Your free dossier identifies the people who'd interview you — their background, what they value, and how to reach out so you stand out before applying.

About IonQ: IonQ, Inc . [NYSE: IONQ] is the world’s leading quantum platform and merchant supplier - delivering integrated quantum solutions across computing, networking, sensing, and security. IonQ’s newest generation of quantum computers, the IonQ Tempo, is the latest in a line of cutting-edge systems that have been helping customers and partners including Amazon Web Services, and AstraZeneca achieve 20x performance results and accelerate innovation in drug discovery, materials science, financial modeling, logistics, cybersecurity, and defense. In 2025, the company achieved 99.99% two-qubit gate fidelity, setting a world record in quantum computing performance . Headquartered in College Park, Maryland, IonQ has operations in California, Colorado, Massachusetts, Tennessee, Washington, Italy, South Korea, Sweden, Switzerland, Canada, and the United Kingdom. Our quantum computing services are available through all major cloud providers, while we also meet the needs of networking and sensing customers across land, sea, air, and space. IonQ is making quantum platforms more accessible and impactful than ever before. Location: This role is based at our Oxford, England (UK) office, with the option to work a few days a week remotely. Travel: Up to 5% Job ID: 1765 Role: We are looking for a Staff Analog Mixed-Signal Design and Verification Engineer to join our Cryo-CMOS IC team at IonQ Oxford. In this role, you will design analog and mixed-signal blocks from specification through circuit design, simulation, layout, tape-out and silicon validation. You will also own top-level chip integration and modelling as a first-class part of our Cryo-CMOS development flow. In this you will build and maintain the model of the chip that the whole team simulates against, a mixed-abstraction model combining transistor-level circuits with Verilog-A/Verilog-AMS and SystemVerilog real-number behavioural blocks. You will decide which blocks are represented at which level of abstraction, keep the models faithful to the schematics and measured silicon. The full-chip model will then be used to verify the ASICs

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