Technical Program Manager, Silicon

Anthropic · San Francisco, CA | New York City, NYsenior

En corto

▸Gestiona todo el ciclo de vida de un chip personalizado para Claude, desde arquitectura hasta producción.
▸Trabajas con partners externos clave (fabricantes, IP, diseño ASIC) y construyes procesos desde cero.
▸Usas IA (Claude) como herramienta principal para mejorar la gestión de programas.

Fluent written communication in English

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¿Qué piden?

✓8+ años en gestión de programas de silicio o SoC, con un chip que se tapeó y llegó a producción.
✓Experiencia directa en todas las fases del ciclo de vida del silicio: frontend, DV, PD, DFT, fundición, empaquetado.
✓Habilidad para gestionar partners externos (ASIC, IP, foundry, OSAT) con SOW y seguimiento de entregas.
✓Capacidad para construir procesos y mecanismos de programación desde cero en entornos ambiguos.
✓Comunicación escrita sólida para planes, revisiones y actualizaciones ejecutivas.
✓Autonomía alta y capacidad para tomar decisiones clave sin estructuras procesales establecidas.

¿No cumplís todo? Es lo normal — tu dossier gratis te dice qué gaps tenés y cómo cubrirlos en la entrevista.

SiCSoCRTLDVPDDFTFoundryOSATChip tapeoutPost-silicon bring-up

¿A quién escribirle en Anthropic?

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About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Anthropic is building custom silicon for Claude. The hardware our models run on is one of the most direct levers we have on capability, cost, and reliability — and we've decided to take design authority over it ourselves. We're looking for a Technical Program Manager to own end-to-end execution of our silicon, from architecture definition through tapeout, first-silicon bring-up, and production ramp. You'll be working alongside a small group of domain experts across front-end design, verification, physical design, DFT, analog/mixed-signal, foundry, and packaging. There is no process to inherit — you'll build the execution machinery this program runs on. This is a partner-heavy program by design. You'll drive a portfolio of external engagements — ASIC design services, IP vendors, foundry, and OSAT. You should have shipped chips before, know what a realistic silicon schedule looks like and its failure modes, and be comfortable making consequential program calls without a large organization behind you. And because this is Anthropic, you'll have Claude as a collaborator — we expect the TPMs on this team to push hard on what AI-assisted program management can look like. Key responsibilities • Own the integrated silicon program plan — architecture closure, RTL freeze, DV milestones, IP delivery, PD closure, DFT, tapeout, and post-silicon bring-up. • Drive external partner execution across ASIC design partners, IP vendors, foundry, and packaging/test. • Run technology and IP selection as a program: track candidate vendors and options, drive evaluations to a decision, and land the build / buy / license calls with engineering leadership. • Build the execution mechanisms a silicon team needs — milestone definitions, risk and dependency tracking, design reviews, release management, exec reporting — and keep them lightweight enough that engineers actually use them. • Manage the interface between silicon and its consumers: hardware systems for package/board/bring-up, and inference/kernels/compiler teams for hardware-software co-design, so trade-offs land as coordinated decisions rather than late surprises. • Own the post-silicon program — bring-up planning, ATE/test handoff, sample distribution, validation, and the path to production readiness. • Develop and share AI-assisted approaches to program management — schedule and dependency modeling, spec and milestone consistency checking, partner-deliverable tracking, status synthesis. Minimum qualifications • 8+ years in silicon/SoC program management, chip lead, or an equivalent role that owned a chip schedule end to end. • Direct ownership of at least one program that taped out and reached production, with milestones you can speak to in detail — including where it slipped and what you did about it. • Working technical fluency across the silicon lifecycle — front-end, DV, PD, DFT, foundry, packaging. • Experience running external silicon partners — ASIC houses, IP vendors, foundry, or OSAT — including SOW scoping, delivery tracking, and escalation. • Track record of building program mechanisms from scratch on an ambiguous, fast-moving effort. • Strong written communication — plans, reviews, and exec updates that many teams depend on. • Comfort operating with high autonomy and limited process on a highly dynamic program. Preferred qualifications • Experience on ML accelerators, high-performance compute,

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