Digital Design Verification Engineer

Olix·Bristol, UKsenior

In short

→Ingeniero de verificación de diseño digital para aceleradores de IA de vanguardia con enfoque en rendimiento en tiempo real.
→Día a día: verificación de pipelines de datos de alta velocidad, pruebas con SystemVerilog/UVM, simulación, formal y validación en FPGA/silicio.
→Destacado: trabajo en un acelerador de decodificación de rack escala con integración de óptica, lógica y señales mixtas.

Fluent communication in English is required.

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The questions they'll ask you

1. ¿Cómo diseñarías un entorno UVM para verificar un pipeline de datos de 5 GSPS con handshaking robusto?

🔒 +7 more questions

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💵 USD · Remote · No visa

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What they ask for

✓5+ años de experiencia en verificación digital para ASICs o SoCs de alto rendimiento.
✓Experiencia comprobada en verificación de bloques complejos con flujos de datos continuos en tiempo real.
✓Dominio de SystemVerilog, UVM y técnicas de verificación basada en afirmaciones (SVA).
✓Habilidades en análisis CDC/RDC y verificación en dominios de reloj de GHz.
✓Experiencia con MATLAB/Simulink o Python para modelado de algoritmos y generación de vectores de prueba.
✓Capacidad para colaborar con equipos multidisciplinarios (diseño, óptica, señales mixtas, software).

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SystemVerilogUVMSVACocoTBMATLABSimulinkPythonNumPyFormal VerificationRTL Simulation

Who should you write to at Olix?

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About OLIX AI is growing faster than any technology in history and the explosion in demand has created a massive infrastructure gap; we can no longer build chips or power stations fast enough to keep up. The industry is still leaning on a ten-year-old hardware blueprint that has reached its limit. A new paradigm that is faster and more efficient will be the biggest economic opportunity of the next century and create the most important company of the next decade. The OLIX Decode Accelerator 1 (DX-1) is the first accelerator architected specifically for decode. Rack-scale co-design of logic, data movement, packaging, optics and interconnect enables a step change in system level performance. The Role We are seeking highly skilled and motivated Senior / Staff Digital Verification Engineers with a strong background in CMOS digital design and verification to take ownership of the functional correctness of high-speed, real-time data-processing silicon, from early algorithm modelling through verified RTL, sign-off, and silicon bring-up. You will join a multidisciplinary group creating groundbreaking hardware where digital, optical, and mixed-signal domains intersect. The ideal candidate brings deep expertise in digital verification methodologies, a solid understanding of hardware architecture, and a passion for building provably correct, high-performance systems that underpin breakthrough AI hardware. g. UVM. Nice to have Tape-out experience on an advanced process node Deep hands-on experience with formal verificat

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